Nitro - SoC
The Nitro-SoC™ netlist-to-GDSII system comprehensively addresses the time-to-market, performance, capacity, power, area and variability challenges encountered at the leading-edge process nodes. This advanced physical design implementation tool has best-in-class physical implementation engines including design planning, placement, physical synthesis, clock tree synthesis, routing, power optimization and manufacturability.
Nitro-SoC is architected to handle the complex multi-patterning and FinFET requirements at advanced process technologies. It provides the highest capacity in the industry with a very compact and scalable database to handle designs that contain hundreds of millions of instances. The low-power suite enables both leakage and dynamic power reduction throughout the flow and power-aware clock tree synthesis. Native integration with the Mentor Graphics Calibre engines minimizes physical verification ECOs and enables signoff checks during implementation.
Some key features and benefits of Nitro-SoC:
- Comprehensive multi-patterning and FinFET aware place and route system for advanced technology nodes
- Best performance, power, and area with true and concurrent CycleOpt throughout the flow
- Flexible architecture to support complex multi-VDD design styles and sign-off driven power optimization
- Compact and scalable database to effectively handle extremely large design sizes
- Reduced design planning iterations with data flow graph driven Automatic Macro Placement
- Best area and highest utilization with proprietary area recovery technologies throughout the flow
- Highest performance with patented multi-corner, multi-mode (MCMM) analysis and optimization architecture
- Integrated Calibre signoff to achieve manufacturing closure during physical design implementation
- Fastest time-to-market with a throughput of up to 2 million instances in 24 hours