SDADC is an integrated design of two PCBs, the first PCB (Signal conditioning board)has pre-amplifier, anti-aliasing filter, programmable gain array(digital potentiometer) and Sigma Delta ADC and the second PCB(Digital board)has Intel Max 10 FPGA which is stacked with the first PCB acts as a controller for the functioning of both the PCBs.
Digital Board receives ADC data and convert it to suitable frame format using the Intel Max 10 FPGA. FPGA alsogenerates clock signal for the ADC and controls the SPI mode of operation of the ADC. Gain control bits for the digital potentiometer arealso controlled by FPGA.
Key Features